Digital Mixed Signal ASIC Design Engineer

Role Overview

This role involves top-level digital architecture planning for digitally assisted analog designs. The candidate will manage the HDL-based digital design flow, including verification, simulation, and implementation, ensuring timely and functional delivery for ASIC projects.

Key Responsibilities

• Plan top-level digital architecture, including partitioning for digitally assisted analog design.
• Execute HDL-based digital design flow, including verification, simulation, and implementation.
• Develop chip and block level digital/mixed-signal test benches and FPGA prototypes.
• Coordinate technical specifications for verification with relevant experts.
• Evaluate silicon, perform test correlation, and develop scripting (Perl, Python, C++).
• Collaborate with the verification team on plans, test cases, and result analysis.

Requirements Snapshot

• Master's/Diploma in Electrical Engineering, Computer Science, or Communications Engineering.
• Minimum 5 years of relevant experience.
• Experience in digital design focused on mixed-signal designs is mandatory.
• Good spoken and written English skills.
• Team-oriented, customer-oriented, and quality-conscious personality.

Expected Impact

The successful candidate will be instrumental in the timely and functional delivery of ASIC projects, contributing to the overall success of complex digital and mixed-signal designs.

Why Apply

• Opportunity to work on cutting-edge digital architecture and mixed-signal designs.
• Contribute to critical ASIC projects with significant impact.
• Join a team-oriented and quality-conscious environment in Valencia.