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ALTEN

Munich

Digital Design Engineer Semiconductor (all gender)

FULL TIME ON-SITE MID
Posted about 2 months ago
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Summary

Role Overview

This role involves designing and verifying digital functionality using SystemVerilog, adapting existing IP, and managing the synthesis and implementation process. You will be responsible for ensuring the quality and performance of the digital designs through rigorous verification and simulation.

Key Responsibilities

  • Develop SystemVerilog code for digital functionality.
  • Adapt and enhance existing IP modules for new features.
  • Set up and execute logic synthesis with constraint management.
  • Perform implementation verification using Spyglass and LEC.
  • Conduct power simulations and analyze results.
  • Prepare comprehensive design documentation.

Requirements Snapshot

  • Degree in Electrical Engineering, Computer Science, Physics, or similar.
  • Proven experience in RTL design and verification (SystemVerilog, VHDL).
  • Strong background in logic synthesis, timing analysis, and power simulation.
  • Experience with industry-standard tools (Spyglass, DesignCompiler, LEC, Xcelium, ATPG).
  • Good communication skills in English.

Expected Impact

The successful candidate will contribute to the development of high-quality, performant digital designs, ensuring they meet functional, timing, and power requirements. This role directly impacts the successful implementation and delivery of complex digital systems.

Why Apply

  • Opportunity to work on cutting-edge digital design and verification.
  • Benefit from career development through Talent Management programs.
  • Enjoy a good work-life balance with flexible working hours and mobile options.

This summary was generated from the original job posting (AI-assisted, human-reviewed). For full details, visit the company's site.

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